Joined February 2017
·

justincdas

Posted to Vim and SystemVerilog over 1 year ago

--regex-systemverilog=/^[ \t](static)?[ \t](local)?[ \t](private)?[ \t]real[ \t]([a-zA-Z_0-9]+)./`\4/v,variable

Above line last character "/" is missing hence creating error...

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